Usually, a GOA driving circuit is applied to a low temperature poly-silicon (LTPS) display panel, and two or three clock signals and two direct current (DC) levels (a high level VGH and a low level VGL) are used by most of the GOA circuits, so as to achieve a function of a shift register when gate lines are scanned progressively.
As shown in FIG. 1, an existing Nth-level GOA driving unit of the GOA driving circuit for the LTPS display panel includes an input end, a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, a first capacitor C1, a second capacitor C2, and a gate driving signal output end GN. T1, T2, T3, T4, T5, T6 and T7 are all p-type transistors. The input end is configured to receive an (N−1)th gate driving signal GN-1 from an (N−1)th GOA driving unit as a triggering signal, the gate driving signal output end GN is configured to output an Nth gate driving signal, and N is an integer greater than 1.
The existing GOA driving circuit includes seven transistors and two storage capacitors, and it uses two clock signals (a first clock signal CLK and a second clock signal CLKB) and two DC signals (the high level VGH and the low level VGL). Too many signal lines and transistors are used by the 7T2C-based GOA driving circuit, so it is difficult to provide a display device with a narrow bezel having a width of less than 1 mm.